1. Field of the Invention
The present invention relates to an overlay key for use in a semiconductor device, a method of manufacturing the same and a method of measuring an overlay degree using the same.
2. Description of the Related Art
As semiconductor devices have become more highly integrated, a density of patterns formed on a wafer has become greater. In particular, cell region pattern density has become greater than in peripheral regions.
Components in the cell region and/or the peripheral region are formed by repeatedly performing a deposition process and a patterning process. In such patterning processes or photolithography processes, one of the most important parameters is an overlay degree that represents how accurate a currently formed layer in a current process step is formed on a previously formed layer in a previous process step. An overlay key is used to measure such an overlay degree, that is a degree of misalignment between a currently formed layer and a previously formed layer.
FIGS. 1A to 1C are plan views illustrating a conventional overlay key. The overlay key 100 includes first and second overlay keys 10 and 15. An overlay degree between the previously formed layer and the currently formed layer can be measured by measuring a distance between the first and second overlay keys 10 and 15. Typically, in order to measure a distance between the first and second overlay keys 10 and 15, an optical method is used that measures, using an optical microscope, an optical contrast difference between the first overlay key 10 formed in a previous process step and the second overlay key 15 formed in a current process step.
A method of measuring an overlay degree using the conventional overlay key is explained in detail with reference to FIGS. 2A and 2B as follows. In FIG. 2A, reference numeral 5 represents a range to be measured by an overlay measuring apparatus (not shown). The range 5 to be measured is confined to a portion (e.g., see 11 in FIG. 1C) that is defined by imaginary lines extended outwardly from two parallel outside lines of the second overlay key 15, and that corresponds to respective sides of the second overlay key 15.
FIG. 2B is a cross-sectional view taken along line 2B-2B of FIG. 2A. As shown in FIG. 2B, after positioning the overlay measuring apparatus over the overlay key 100, light 106 is irradiated toward the overlay key 100. Light 106 irradiated toward the overlay key 100 is reflected from the overlay keys 10 and 15 and then is directed toward an optical sensor of the overlay measuring apparatus. However, irradiated light incident on both edges of the overlay keys 10 and 15 is scattered, and thus a small amount of reflected light is directed from the edges of the overlay keys 10 and 15 to the optical sensor of the overlay measuring apparatus. As a result, light detected by the optical sensor has a waveform S as shown in FIG. 2B. As can be seen in the waveform S, a degree of misalignment, or an overlay degree, can be measured by measuring distances d1 and d2 between the first and second overlay keys 10 and 15. That is, an overlay degree is “(d1−d2)/2”.
In the conventional overlay measuring method, since the second overlay key 15 is made of a photoresist, light reflected from the second overlay key 15 is very high in contrast when read by the overlay measuring apparatus, so that the second overlay key 15 has high measuring reliability. However, since several process steps may occur after formation of the first overlay key 10, a contrast of light reflected from the first overlay key 10 is relatively low, and therefore the first overlay key 10 has low measuring reliability.
Also, in the case of forming a metal layer on the structure, a subsequent overlay measurement may not be accurate due to the presence of metal grains. A metal layer may be asymmetrically deposited on the overlay keys. Accordingly, a measuring reliability of an overlay degree may be further lowered.
As described above, in the case that measuring reliability is low, measuring error may become large. Also, in order to confirm an overlay degree, a wafer should be vertically cut and then inspected using a scanning electron microscope (SEM). There is however a problem in that the wafer having a vertically cut cross-section cannot be used again.